Publikation

Consistent SystemC and VHDL Code Generation from State Charts for Virtual Prototyping and RTL Synthesis

Outline:

R. Findenig, T. Leitner, V. Esen, W. Ecker - Consistent SystemC and VHDL Code Generation from State Charts for Virtual Prototyping and RTL Synthesis - Proceedings of DVCon 2011, San Jose, CA, Vereinigte Staaten von Amerika, 2011

2011

Personen:

  • Dipl.-Ing. (FH) Rainer Leonhard Findenig

Forschungseinheiten: